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/projects/cubeos/src_current/hardware/mc68332.h File Reference

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Go to the source code of this file.

Defines
#define	SIM_MCR   SIM_BASE + 0x00
#define	SIM_SYNCR   SIM_BASE + 0x04
#define	SIM_RSR   SIM_BASE + 0x07
#define	SIM_SYPCR   SIM_BASE + 0x21
#define	SIM_PICR   SIM_BASE + 0x22
#define	SIM_PITR   SIM_BASE + 0x24
#define	SIM_SWSR   SIM_BASE + 0x27
#define	SIM_CSPAR0   SIM_BASE + 0x44
#define	SIM_CSPAR1   SIM_BASE + 0x46
#define	SIM_CSBARBT   SIM_BASE + 0x48
#define	SIM_CSORBT   SIM_BASE + 0x4a
#define	SIM_CSBAR0   SIM_BASE + 0x4c
#define	SIM_CSOR0   SIM_BASE + 0x4e
#define	SIM_CSBAR1   SIM_BASE + 0x50
#define	SIM_CSOR1   SIM_BASE + 0x52
#define	SIM_CSBAR2   SIM_BASE + 0x54
#define	SIM_CSOR2   SIM_BASE + 0x56
#define	SIM_CSBAR3   SIM_BASE + 0x58
#define	SIM_CSOR3   SIM_BASE + 0x5a
#define	SIM_CSBAR4   SIM_BASE + 0x5c
#define	SIM_CSOR4   SIM_BASE + 0x5e
#define	SIM_CSBAR5   SIM_BASE + 0x60
#define	SIM_CSOR5   SIM_BASE + 0x62
#define	SIM_CSBAR6   SIM_BASE + 0x64
#define	SIM_CSOR6   SIM_BASE + 0x66
#define	SIM_PEPAR   SIM_BASE + 0x17
#define	SIM_DDRE   SIM_BASE + 0x15
#define	SIM_PORTE   SIM_BASE + 0x11
#define	SIM_PFPAR   SIM_BASE + 0x1F
#define	SIM_DDRF   SIM_BASE + 0x1D
#define	SIM_PORTF   SIM_BASE + 0x19
#define	QSM_QSMCR   SCI_BASE + 0x00
#define	QSM_QTEST   SCI_BASE + 0x02
#define	QSM_QILR   SCI_BASE + 0x04
#define	QSM_QIVR   SCI_BASE + 0x05
#define	SCI_SCSR   SCI_BASE + 0x0c
#define	SCI_SCDR   SCI_BASE + 0x0e
#define	SCI_SCCR0   SCI_BASE + 0x08
#define	SCI_SCCR1   SCI_BASE + 0x0a
#define	SPI_SPCR0   SCI_BASE + 0x18
#define	SPI_SPCR1   SCI_BASE + 0x1a
#define	SPI_SPCR2   SCI_BASE + 0x1c
#define	SPI_SPCR3   SCI_BASE + 0x1e
#define	SPI_SPSR   SCI_BASE + 0x1f
#define	SPI_QPDR   SCI_BASE + 0x15
#define	SPI_QPAR   SCI_BASE + 0x16
#define	SPI_QDDR   SCI_BASE + 0x17
#define	QSM_PORTQS   SCI_BASE + 0x14
#define	QSM_PQSPAR   SCI_BASE + 0x16
#define	QSM_DDRQS   SCI_BASE + 0x17
#define	SPI_RDRAM   SCI_BASE + 0x100
#define	SPI_TDRAM   SCI_BASE + 0x120
#define	SPI_CMDRAM   SCI_BASE + 0x140
#define	CPURAMCTRL_MCR   CPURAMCTRL_BASE + 0x0
#define	CPURAMCTRL_TST   CPURAMCTRL_BASE + 0x2
#define	CPURAMCTRL_BAR   CPURAMCTRL_BASE + 0x4

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Define Documentation

#define CPURAMCTRL_BAR   CPURAMCTRL_BASE + 0x4

Definition at line 82 of file mc68332.h.

#define CPURAMCTRL_MCR   CPURAMCTRL_BASE + 0x0

Definition at line 80 of file mc68332.h.

#define CPURAMCTRL_TST   CPURAMCTRL_BASE + 0x2

Definition at line 81 of file mc68332.h.

#define QSM_DDRQS   SCI_BASE + 0x17

Definition at line 74 of file mc68332.h.

#define QSM_PORTQS   SCI_BASE + 0x14

Definition at line 72 of file mc68332.h.

#define QSM_PQSPAR   SCI_BASE + 0x16

Definition at line 73 of file mc68332.h. Referenced by SPI_init.

#define QSM_QILR   SCI_BASE + 0x04

Definition at line 54 of file mc68332.h. Referenced by QSM_init.

#define QSM_QIVR   SCI_BASE + 0x05

Definition at line 55 of file mc68332.h. Referenced by QSM_init.

#define QSM_QSMCR   SCI_BASE + 0x00

Definition at line 52 of file mc68332.h. Referenced by QSM_init.

#define QSM_QTEST   SCI_BASE + 0x02

Definition at line 53 of file mc68332.h.

#define SCI_SCCR0   SCI_BASE + 0x08

Definition at line 59 of file mc68332.h. Referenced by _QSM_sci_setbps, and QSM_sciinit.

#define SCI_SCCR1   SCI_BASE + 0x0a

Definition at line 60 of file mc68332.h. Referenced by _QSM_sci_dis_rx, _QSM_sci_dis_tx, _QSM_sci_en_rx, _QSM_sci_en_tx, QSM_sci_int, and QSM_sciinit.

#define SCI_SCDR   SCI_BASE + 0x0e

Definition at line 58 of file mc68332.h. Referenced by _QSM_sci_txbyte, QSM_sci_int, and QSM_sci_rxchar.

#define SCI_SCSR   SCI_BASE + 0x0c

Definition at line 57 of file mc68332.h. Referenced by _QSM_sci_txbyte, QSM_sci_int, and QSM_sci_rxchar.

#define SIM_CSBAR0   SIM_BASE + 0x4c

Definition at line 29 of file mc68332.h.

#define SIM_CSBAR1   SIM_BASE + 0x50

Definition at line 31 of file mc68332.h.

#define SIM_CSBAR2   SIM_BASE + 0x54

Definition at line 33 of file mc68332.h.

#define SIM_CSBAR3   SIM_BASE + 0x58

Definition at line 35 of file mc68332.h. Referenced by I2C_init, RCJ_init, and RG_init.

#define SIM_CSBAR4   SIM_BASE + 0x5c

Definition at line 37 of file mc68332.h. Referenced by I2C_init.

#define SIM_CSBAR5   SIM_BASE + 0x60

Definition at line 39 of file mc68332.h.

#define SIM_CSBAR6   SIM_BASE + 0x64

Definition at line 41 of file mc68332.h.

#define SIM_CSBARBT   SIM_BASE + 0x48

Definition at line 27 of file mc68332.h. Referenced by FLASH_init.

#define SIM_CSOR0   SIM_BASE + 0x4e

Definition at line 30 of file mc68332.h.

#define SIM_CSOR1   SIM_BASE + 0x52

Definition at line 32 of file mc68332.h.

#define SIM_CSOR2   SIM_BASE + 0x56

Definition at line 34 of file mc68332.h.

#define SIM_CSOR3   SIM_BASE + 0x5a

Definition at line 36 of file mc68332.h. Referenced by I2C_init, RCJ_fast, RCJ_init, RCJ_slow, and RG_init.

#define SIM_CSOR4   SIM_BASE + 0x5e

Definition at line 38 of file mc68332.h. Referenced by I2C_init.

#define SIM_CSOR5   SIM_BASE + 0x62

Definition at line 40 of file mc68332.h.

#define SIM_CSOR6   SIM_BASE + 0x66

Definition at line 42 of file mc68332.h.

#define SIM_CSORBT   SIM_BASE + 0x4a

Definition at line 28 of file mc68332.h. Referenced by FLASH_init.

#define SIM_CSPAR0   SIM_BASE + 0x44

Definition at line 25 of file mc68332.h. Referenced by I2C_init, RCJ_init, and RG_init.

#define SIM_CSPAR1   SIM_BASE + 0x46

Definition at line 26 of file mc68332.h.

#define SIM_DDRE   SIM_BASE + 0x15

Definition at line 45 of file mc68332.h. Referenced by init_LED.

#define SIM_DDRF   SIM_BASE + 0x1D

Definition at line 49 of file mc68332.h.

#define SIM_MCR   SIM_BASE + 0x00

Definition at line 18 of file mc68332.h. Referenced by KERN_exphandler, KERN_panic, and KERN_softreset.

#define SIM_PEPAR   SIM_BASE + 0x17

Definition at line 44 of file mc68332.h. Referenced by init_LED.

#define SIM_PFPAR   SIM_BASE + 0x1F

Definition at line 48 of file mc68332.h.

#define SIM_PICR   SIM_BASE + 0x22

Definition at line 22 of file mc68332.h. Referenced by KERN_init_ptimer.

#define SIM_PITR   SIM_BASE + 0x24

Definition at line 23 of file mc68332.h. Referenced by _settimeofday, KERN_init_ptimer, and settimeofday.

#define SIM_PORTE   SIM_BASE + 0x11

Definition at line 46 of file mc68332.h. Referenced by init_LED, LED_OFF, and LED_ON.

#define SIM_PORTF   SIM_BASE + 0x19

Definition at line 50 of file mc68332.h.

#define SIM_RSR   SIM_BASE + 0x07

Definition at line 20 of file mc68332.h.

#define SIM_SWSR   SIM_BASE + 0x27

Definition at line 24 of file mc68332.h.

#define SIM_SYNCR   SIM_BASE + 0x04

Definition at line 19 of file mc68332.h.

#define SIM_SYPCR   SIM_BASE + 0x21

Definition at line 21 of file mc68332.h.

#define SPI_CMDRAM   SCI_BASE + 0x140

Definition at line 78 of file mc68332.h. Referenced by SPI_init, and SPI_newcommand.

#define SPI_QDDR   SCI_BASE + 0x17

Definition at line 70 of file mc68332.h. Referenced by FBIN_make.

#define SPI_QPAR   SCI_BASE + 0x16

Definition at line 69 of file mc68332.h. Referenced by FBIN_make.

#define SPI_QPDR   SCI_BASE + 0x15

Definition at line 68 of file mc68332.h. Referenced by FBIN_make, and FBIN_set.

#define SPI_RDRAM   SCI_BASE + 0x100

Definition at line 76 of file mc68332.h. Referenced by SPI_init.

#define SPI_SPCR0   SCI_BASE + 0x18

Definition at line 62 of file mc68332.h. Referenced by SPI_init.

#define SPI_SPCR1   SCI_BASE + 0x1a

Definition at line 63 of file mc68332.h. Referenced by SPI_init, and SPI_resetcmd.

#define SPI_SPCR2   SCI_BASE + 0x1c

Definition at line 64 of file mc68332.h. Referenced by SPI_init.

#define SPI_SPCR3   SCI_BASE + 0x1e

Definition at line 65 of file mc68332.h. Referenced by SPI_init.

#define SPI_SPSR   SCI_BASE + 0x1f

Definition at line 66 of file mc68332.h.

#define SPI_TDRAM   SCI_BASE + 0x120

Definition at line 77 of file mc68332.h. Referenced by SPI_init.

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