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/projects/cubeos/src_current/drivers/spi/spi.c

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00001 #include <spi.h>
00002 #include <stdio.h>
00003 #include <cubeos.h>
00004 #include <mc68332.h>
00005 #include <qsm.h>
00006 
00007 int _SPI_cmdcnt=0;
00008 
00009 
00010 int SPI_init()
00011 {
00012 int i;
00013 
00014 printf("SPI init\n");
00015 
00016 QSM_init();
00017 
00018 
00019 writeshort (QSM_PQSPAR, (readshort (QSM_PQSPAR)|0x1b01E)&0xFFFE );
00020 /* Use PCS1,PCS0,MISO,MOSI for SCI*/
00021 /* PCS1,0,SCK,MOSI output MISO input */
00022 
00023 writeshort(SPI_SPCR1,readshort(SPI_SPCR1)&0x7FFF); /* disable QSPI */
00024 
00025 /* SMBII code */
00026 writeshort(SPI_SPCR0,0xA811);   /* Master mode, Normal outputs, 10 bits */
00027                                 /* CPOL=0 CPHA=0  493Khz clock freq. */
00028 writeshort(SPI_SPCR2,0x300);    /* int disabled, wrap disabled, wrap to 0 */
00029                                 /* start pointer is 0, end pointer is 3 */
00030 writeshort(SPI_SPCR3,0x0);
00031                                 /* loop mode off,HALTA and MODF irqs off */
00032                                 /* halt off, status register all 0 */
00033 
00034 for (i=0;i<16;i+=2){ /* clear out dual ported RAM */
00035         writeshort(SPI_RDRAM+i,0);
00036         writeshort(SPI_TDRAM+i,0);
00037         writeshort(SPI_CMDRAM+i,0);
00038 }
00039 
00040 
00041 /* SMBII code */
00042 //  writebyte(SPI_CMDRAM,0xdc); /* CONT BITSE /DT DSCK  PCS3 PCS2 /PCS1 /PCS0 */
00043 //  writebyte(SPI_CMDRAM+1,0x8c); /* CONT /BITSE /DT /DSCK  PCS3 PCS2 /PCS1 /PCS0 */
00044 //  writebyte(SPI_CMDRAM+2,0xcc); /* CONT BITSE /DT /DSCK  PCS3 PCS2 /PCS1 /PCS0 */
00045 //  writebyte(SPI_CMDRAM+3,0x4c); /* /CONT BITSE /DT /DSCK  PCS3 PCS2 /PCS1 /PCS0 */
00046 
00047 
00048 
00049 //  writeshort(SPI_SPCR1,0x8000); /* enable QSPI */
00050 
00051 //  while ((readshort(SPI_SPSR) & 0x80) == 0); /* wait for finished */
00052 //  writeshort(SPI_SPSR,0);                  /* reset status */
00053 //  writeshort(SPI_TDRAM,0x100);                     /* Send 0x100 */ 
00054 
00055 //  writeshort(SPI_SPCR1,0x8000);
00056 //  while ((readshort(SPI_SPSR) & 0x80) == 0);
00057 //  writeshort(SPI_SPSR,0);
00058 
00059 //  writeshort(SPI_SPCR0,0xB811);
00060 //  writebyte(SPI_CMDRAM+4,0x4e);
00061 //  writeshort(SPI_SPCR2,0x404);
00062 //  writebyte(SPI_QPDR,0xf8);
00063 //  for (i = 1; i <= 8; i++) {
00064 //    writebyte(SPI_CMDRAM+4,i << 8);
00065 //    writeshort(SPI_SPCR1,0x8000);
00066 //    while ((readshort(SPI_SPCR1) & 0x8000) != 0);
00067 //  }
00068 
00069 return 0;
00070 }
00071 
00072 
00073 int SPI_resetcmd()
00074 {
00075   writeshort(SPI_SPCR1,0x0000); /* disable QSPI */
00076   _SPI_cmdcnt=0;
00077   return(0);
00078 }
00079 
00080 int SPI_newcommand(unsigned char command)
00081 {
00082  if (_SPI_cmdcnt<16)
00083 {
00084         writebyte(SPI_CMDRAM+(_SPI_cmdcnt++),command);
00085         return(_SPI_cmdcnt-1);
00086 } else {
00087         return(-1);
00088 }
00089 }
00090 
00091 int SPI_init_analog()
00092 {
00093 
00094 printf("SPI init analog\n");
00095 
00096 return 0;
00097 
00098 }
00099 
00100 int SPI_ReadAnalogIn(int chip, int channel)
00101 {
00102 
00103 print ("SPI ReadAnalogIn %d %d\n",chip,channel);
00104 
00105 return 15;
00106 }
00107 
00108 void QSM_qspi_int ()
00109 {
00110 
00111 
00112 }

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